Merge pull request #3473 from sharkdp/dependabot/submodules/assets/syntaxes/02_Extra/SystemVerilog-b340f1c

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build(deps): bump assets/syntaxes/02_Extra/SystemVerilog from `7eca705` to `b340f1c`

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auto-merge-dependabot-prs[bot] authored and GitHub committed 2025-11-01 09:37:25 +00:00

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commit 2f5cba7f8f

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assets/syntaxes/02_Extra/SystemVerilog

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Submodule assets/syntaxes/02_Extra/SystemVerilog updated: 7eca705e87...b340f1c7f6.